Flexible polyimide interposer for CSP preparation

V. Beyer, F. Kuchenmeister, M. Bottcher, E. Meusel
{"title":"Flexible polyimide interposer for CSP preparation","authors":"V. Beyer, F. Kuchenmeister, M. Bottcher, E. Meusel","doi":"10.1109/ADHES.1998.742012","DOIUrl":null,"url":null,"abstract":"Chip size packaging (CSP) is a promising approach in packaging and interconnect technologies in order to solve the increasing demands in microelectronics and microsystems. The application of bare dies to produce electrical components is considered as the major advantage of this packaging concept. In this study, an interposer consisting of a polyimide film is attached by a pre-deposited adhesive at the active side of the chip. Photolithography for patterning the conductor lines in a semiadditive processing sequence was employed. Bond wire techniques were used to connect the bond pads at the interposer and the die. The detailed description of the technology focuses on the adhesive deposition, the fabrication of the conductor pattern and the attachment of the pre-fabricated assembly to the board by soldering techniques.","PeriodicalId":183195,"journal":{"name":"Proceedings of 3rd International Conference on Adhesive Joining and Coating Technology in Electronics Manufacturing 1998 (Cat. No.98EX180)","volume":"186 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 3rd International Conference on Adhesive Joining and Coating Technology in Electronics Manufacturing 1998 (Cat. No.98EX180)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ADHES.1998.742012","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

Abstract

Chip size packaging (CSP) is a promising approach in packaging and interconnect technologies in order to solve the increasing demands in microelectronics and microsystems. The application of bare dies to produce electrical components is considered as the major advantage of this packaging concept. In this study, an interposer consisting of a polyimide film is attached by a pre-deposited adhesive at the active side of the chip. Photolithography for patterning the conductor lines in a semiadditive processing sequence was employed. Bond wire techniques were used to connect the bond pads at the interposer and the die. The detailed description of the technology focuses on the adhesive deposition, the fabrication of the conductor pattern and the attachment of the pre-fabricated assembly to the board by soldering techniques.
CSP制备用柔性聚酰亚胺中间体
芯片尺寸封装(CSP)是解决微电子和微系统日益增长的需求的一种有前途的封装和互连技术。裸模生产电子元件的应用被认为是这种封装概念的主要优势。在这项研究中,一个由聚酰亚胺薄膜组成的中间物通过预先沉积的粘合剂附着在芯片的活性侧。采用光刻技术对导体线进行半加性加工。键合线技术用于连接中间板和模具的键合垫。详细描述了该技术的重点是粘合剂沉积,导体图案的制造以及通过焊接技术将预制组件连接到电路板上。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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