A variable word-width content addressable memory for fast string matching

Abstract

This work deals with off-boding some time critical parts in the process of performing intrusion detection from software to reconfigurable hardware (FPGA). Signatures of known attacks must typically be compared to high speed network traffic, and string matching becomes a bottleneck Content Addressable Memories (CAMS) are known to be fast string matchers, but offer little flexibility. For that purpose a Variable Word- Width CAM for fast string matching has been designed and implemented in an FPGA A typical feature for this CAM is that the length of each word is independent from the others, in contrast to common CAMs where all words have the same length. The design has been functionally tested on a development board for a CAM of size 1822 bytes (128 words). This design processes 8 bits per clock cycle and has a reported maximum clock speed of 100 MHL This gives a thoughput of 800 Mbit/s.