2.5 Gbit/s ATM switch chip set

Abstract

The design and implementation of two application specific integrated circuits used to build an ATM switch are here described, the chip set is composed of: 1) the CMC which is an input/output processor of ATM cells implemented on a BiCMOS 0.7 micron technology; and 2) the ICM, a 0.7 micron CMOS IC, that performs cell switching at 68 MHz. The ATM switch exploits parallelism and segmentation to perform 2.5 Gb/s switching per input/output.