A 5-GHz, 30-dBm, 0.9-dB insertion loss single-pole double-throw T/R switch in 90nm CMOS

Abstract

A 5 GHz, 30-dBm CMOS T/R switch implemented in 90 nm CMOS is reported. A body isolation technique is employed and optimized for power handling capability. Inductors are employed with the transistor switches for parallel resonance to improve isolation. Thick oxide NMOS transistors are used for the switching transistors and placed inside the inductors to reduce the active chip area to approximately 0.2 mm2. 0.9-dB insertion loss for both TX and RX modes is achieved with a 5-V control voltage.