A 24-Bit Block Floating Point Digital Signal Processor

ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference Pub Date : 1989-09-01 DOI:10.1109/ESSCIRC.1989.5468219

G. Dixon, T. Heighway, J. Fox, D. Wadham, L. Williams

引用次数: 0

Abstract

A CMOS 24-bit Block Floating Point Digital Signal Processor chip for Sonar applications is described. The device integrates data and program memory, two arithmetic processing elements, and address generator in a single chip providing a performance improvement of up to ten times that available using standard DSP devices for Sonar signal processing. The device has been implemented on a 1.4 micron two layer metal CMOS process.

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一个24位块浮点数字信号处理器

描述了一种用于声纳应用的CMOS 24位块浮点数字信号处理器芯片。该设备将数据和程序存储器、两个算术处理元件和地址生成器集成在一个芯片中，其性能比用于声纳信号处理的标准DSP设备提高了10倍。该器件已在1.4微米双层金属CMOS工艺上实现。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference

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