{"title":"Design, Simulation, Implementation and Testing of Search and Tracking Modules for a FPGA-Based GPS Receiver","authors":"F. S. Larosa","doi":"10.1109/SPL.2019.8714299","DOIUrl":null,"url":null,"abstract":"GPS receivers constitute a topic of great importance since they have application in many fields of science and industry as geodesy, aviation, security and defense to name a few. The understanding of their internals, including the nature of signals and the algorithms involved in their processing are crucial in the development of customized receivers. In this work, development, simulation and testing of search and tracking modules on a field programmable gate array (FPGA) is presented. Additionally, the architecture of the proposed system is presented along with front end design and implementation. This work presents a low-resource, low-level portable implementation approach that can be easily scaled up.","PeriodicalId":161898,"journal":{"name":"2019 X Southern Conference on Programmable Logic (SPL)","volume":"111 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 X Southern Conference on Programmable Logic (SPL)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPL.2019.8714299","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
GPS receivers constitute a topic of great importance since they have application in many fields of science and industry as geodesy, aviation, security and defense to name a few. The understanding of their internals, including the nature of signals and the algorithms involved in their processing are crucial in the development of customized receivers. In this work, development, simulation and testing of search and tracking modules on a field programmable gate array (FPGA) is presented. Additionally, the architecture of the proposed system is presented along with front end design and implementation. This work presents a low-resource, low-level portable implementation approach that can be easily scaled up.