High-level .NET software implementations of unum type I and posit with simultaneous FPGA implementation using Hastlayer

Zoltan Lehoczky, A. Retzler, Richard Toth, Álmos Szabó, Ben Farkas, Krisztian Somogyi
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引用次数: 5

Abstract

The unum arithmetic framework has been proposed by Gustafson, D. J. to address the short-comings of the IEEE 754 Standard's floating-point. In this paper, we present our software and hardware implementations of Type I and posit unums. The software implementation is built on the .NET platform as an open source library written in the C# programming language. We automatically create hardware implementations using our .NET to FPGA converter tool called Hastlayer. The amount of hardware resources needed for addition operations are quantified, and the performance of software and prototype hardware for posits are compared. We show that posits are significantly more hardware friendly than Type I unums. Furthermore, our posit FPGA implementation is about 2.04 times more efficient per clock cycle than its software implementation.
高级。net软件实现unum类型I和posix,同时使用哈斯层FPGA实现
unum算术框架是由Gustafson, d.j.提出的,用来解决IEEE 754标准中浮点数的缺点。在本文中,我们提出了我们的软件和硬件实现的类型I和状态unum。软件实现建立在。net平台上,作为一个用c#编程语言编写的开源库。我们使用。net到FPGA的转换工具haslayer自动创建硬件实现。对加法运算所需的硬件资源进行了量化,并对软件和原型硬件的性能进行了比较。我们表明,位置明显比I型unum对硬件更友好。此外,我们的FPGA实现每个时钟周期的效率比其软件实现高2.04倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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