PIN diode and integrated JFET on high resistivity silicon: a new test structure

Abstract

A new test structure intended as a pixel for segmented X- and /spl gamma/-ray detectors has been designed fabricated and tested. The structure consists of a PIN diode of 0.8 mm/sup 2/ area and of an n-channel JFET integrated on the same high resistivity (6 k/spl Omega/ cm) silicon chip. The electrical parameters-leakage current, the transconductance and the capacitance have good expected values. Instead, noise in excess is present in the transistor. Operated at room temperature as an X-ray detector with the integrated frontend transistor in the charge sensitive configuration, the new test structure shows an equivalent noise charge of about 60 electrons rms at the optimum shaping time of 3-6 /spl mu/s.