On the use of Verilog HDL in the conversion of existing hardware designs to newer technology

Abstract

The trend towards greater integration of hardware continues, with the attendant benefits of increased density, speed, manufacturability, and reliability. When the updating of an existing design to a new hardware technology becomes necessary, its adaptation must allow for the differences in speed, structure and function of the new hardware medium. With the appearance of hardware description languages and the powerful CAE tools now available, the prospect of automating such a process appears plausible. We consider the "re-spin" of a board design from a TTL/PLD implementation to a gate array implementation, and the question of the automated conversion of hardware designs.