{"title":"LFSR Test Pattern Crosstalk in Nanometer Technologies","authors":"D. Treytnar, M. Redeker, H. Grabinski, F. Ktata","doi":"10.1109/SPI.2002.258315","DOIUrl":null,"url":null,"abstract":"In this paper we investigate the crosstalk influence of interconnects on test patterns in integrated circuits in today and future technologies. The test patterns are produced by a linear feedback shift register (LFSR). We show the per unit length line parameters L’, C’ and R’ of interconnects in 150 nm down to 35 nm technologies wherefore we assume the smallest geometries predicted by the SIA roadmap. Using these parameters we demonstrate that crosstalk influences the signal behaviour depending on the technology used. The test patterns were generated by a 5 bit LFSR using an interconnect system with a length of 1 mm in these future technologies.","PeriodicalId":290013,"journal":{"name":"Proceedings: 6th IEEE Workshop on Signal Propagation on Interconnects","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-05-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings: 6th IEEE Workshop on Signal Propagation on Interconnects","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPI.2002.258315","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In this paper we investigate the crosstalk influence of interconnects on test patterns in integrated circuits in today and future technologies. The test patterns are produced by a linear feedback shift register (LFSR). We show the per unit length line parameters L’, C’ and R’ of interconnects in 150 nm down to 35 nm technologies wherefore we assume the smallest geometries predicted by the SIA roadmap. Using these parameters we demonstrate that crosstalk influences the signal behaviour depending on the technology used. The test patterns were generated by a 5 bit LFSR using an interconnect system with a length of 1 mm in these future technologies.
在本文中,我们研究了互连串扰对集成电路测试模式的影响,在今天和未来的技术。测试模式是由线性反馈移位寄存器(LFSR)产生的。我们展示了从150纳米到35纳米技术的互连的单位长度线参数L ', C '和R ',因此我们假设SIA路线图预测的最小几何形状。使用这些参数,我们证明了串扰影响信号行为取决于所使用的技术。测试图形是由一个5位LFSR生成的,使用这些未来技术中长度为1mm的互连系统。