O. Bair, S. Soundararajan, A. Chen, M. Carbonara, C. Joly
{"title":"System design environment with synthesized blocks approach","authors":"O. Bair, S. Soundararajan, A. Chen, M. Carbonara, C. Joly","doi":"10.1109/ASIC.1995.580753","DOIUrl":null,"url":null,"abstract":"In this paper, we present a module generator capable of generating 14 different functional blocks with various options. Each block is pre-tested, pre-verified and optimized for speed and/or gate count. We also present a system design approach using the functional blocks created by this module generator. The module generator and the system design approach using the synthesized blocks it generates can increase designer productivity resulting in smaller, faster designs in less time.","PeriodicalId":307095,"journal":{"name":"Proceedings of Eighth International Application Specific Integrated Circuits Conference","volume":"61 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Eighth International Application Specific Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1995.580753","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, we present a module generator capable of generating 14 different functional blocks with various options. Each block is pre-tested, pre-verified and optimized for speed and/or gate count. We also present a system design approach using the functional blocks created by this module generator. The module generator and the system design approach using the synthesized blocks it generates can increase designer productivity resulting in smaller, faster designs in less time.