Shinhyuk Choi, Jae-Gil Lee, H. Yoon, H. Cha, Hyungtak Kim
{"title":"Degradation Characteristics of High-Voltage AlGaN/GaN-on-Si Heterostructure FETs under DC Stress","authors":"Shinhyuk Choi, Jae-Gil Lee, H. Yoon, H. Cha, Hyungtak Kim","doi":"10.1109/CSICS.2012.6340103","DOIUrl":null,"url":null,"abstract":"We have fabricated field-plated AlGaN/GaN Heterostructure Field Effect Transistors(HFETs) on Si substrate for high voltage operation and submitted the devices to the DC stress tests to investigate the degradation phenomena. The devices were stressed under two different types of bias configuration including on-state with high current and off-state with low current. Several degradation characteristics such as the reduction of on-current, the increase of gate leakage, and the decrease of transconductance were identified. The degradation showed the moderate dependence on the field plate dimensional parameters and TCAD simulation indicated that this dependence was attributed to the electric field distribution in the channel.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSICS.2012.6340103","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
We have fabricated field-plated AlGaN/GaN Heterostructure Field Effect Transistors(HFETs) on Si substrate for high voltage operation and submitted the devices to the DC stress tests to investigate the degradation phenomena. The devices were stressed under two different types of bias configuration including on-state with high current and off-state with low current. Several degradation characteristics such as the reduction of on-current, the increase of gate leakage, and the decrease of transconductance were identified. The degradation showed the moderate dependence on the field plate dimensional parameters and TCAD simulation indicated that this dependence was attributed to the electric field distribution in the channel.