MBE growth of lattice matched HFETs on InP: material quality and reproducibility

Abstract

In the past, the tremendous potential of InP based devices like HFETs, HBTs etc. for possible use in advanced communication- and sensor systems has been shown many times. However, market relevant manufacturability of these components has not yet been demonstrated in an equivalent manner. An important prerequisite for the successful transfer of research results into scales of industrial relevance is to provide a material basis which is reproducible and competitive to already market introduced III-V technologies. One way to reduce the cost per epi-wafer is the use of thin buffer layers and to switch from 2" to 3" wafers. The technical advantages of thin buffer layers are manifold. Mesa isolation and final mesa height is much more reproducible due to the high selectivity of chemical etchants between InP and InAlAs. Another advantage is, that transmission lines and contact pads in MMICs can be located on semiinsulating material. In this paper we will show that a reduced buffer layer thickness does not affect device performance.