Yeonggeun Song, Kyoung-Soo Ha, H. Ko, Min-Seong Choo, D. Jeong
{"title":"A −247.1 dB FoM, −77.9dBc Reference Spur Ring-Oscillator-Based Injection-Locked Clock Multiplier with Multi-Phase-Based Calibration","authors":"Yeonggeun Song, Kyoung-Soo Ha, H. Ko, Min-Seong Choo, D. Jeong","doi":"10.1109/ESSCIRC55480.2022.9911362","DOIUrl":null,"url":null,"abstract":"This paper presents a ring-oscillator (RO)-based injection-locked clock multiplier (ILCM) with a new background calibration technique that utilizes a multi-phase generation capability of the RO. By detecting phase changes before and after the injection pulse, both a frequency error and an injection path offset are calibrated. The frequency calibrator operates at the injection rate with high bandwidth, which contributes to further suppressing flicker noise of the RO and producing much lower RMS jitter. The path offset calibrator operating at the pulse-gating rate makes the ILCM converge to the state with a minimum reference spur. For a low-power implementation, a sub-sampling bang-bang phase detector is employed for each calibration loop and all of the loops operate at the reference clock rate. Fabricated in 28-nm CMOS, the proposed ILCM achieves 143.6-fs RMS jitter with a −77.9-dBc reference spur and consumes 9.4 mW at the 4.8-GHz operation, which translates to a FoM of −247.1 dB.","PeriodicalId":168466,"journal":{"name":"ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC55480.2022.9911362","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a ring-oscillator (RO)-based injection-locked clock multiplier (ILCM) with a new background calibration technique that utilizes a multi-phase generation capability of the RO. By detecting phase changes before and after the injection pulse, both a frequency error and an injection path offset are calibrated. The frequency calibrator operates at the injection rate with high bandwidth, which contributes to further suppressing flicker noise of the RO and producing much lower RMS jitter. The path offset calibrator operating at the pulse-gating rate makes the ILCM converge to the state with a minimum reference spur. For a low-power implementation, a sub-sampling bang-bang phase detector is employed for each calibration loop and all of the loops operate at the reference clock rate. Fabricated in 28-nm CMOS, the proposed ILCM achieves 143.6-fs RMS jitter with a −77.9-dBc reference spur and consumes 9.4 mW at the 4.8-GHz operation, which translates to a FoM of −247.1 dB.