{"title":"Automatic EB fault tracing system by successive circuit extraction from VLSI CAD layout data","authors":"K. Miura, Kohei Nakata, K. Nakamae, H. Fujioka","doi":"10.1109/ATS.1997.643953","DOIUrl":null,"url":null,"abstract":"An automatic electron beam (EB) fault tracing system is described which enables us to trace faults automatically from the top level cell to the lowest primitive cell and from the primitive cell to the transistor-level circuit independently of circuit functions. Only VLSI CAD layout data is required.","PeriodicalId":330767,"journal":{"name":"Proceedings Sixth Asian Test Symposium (ATS'97)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-11-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Sixth Asian Test Symposium (ATS'97)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.1997.643953","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
An automatic electron beam (EB) fault tracing system is described which enables us to trace faults automatically from the top level cell to the lowest primitive cell and from the primitive cell to the transistor-level circuit independently of circuit functions. Only VLSI CAD layout data is required.