A 65 nm Data Concentration ASIC for the CMS Outer Tracker Detector Upgrade at HL-LHC

B. Nodari, L. Caponetto, G. Galbit, S. Viret, S. Scarfi
{"title":"A 65 nm Data Concentration ASIC for the CMS Outer Tracker Detector Upgrade at HL-LHC","authors":"B. Nodari, L. Caponetto, G. Galbit, S. Viret, S. Scarfi","doi":"10.22323/1.343.0099","DOIUrl":null,"url":null,"abstract":"The Concentrator Integrated Circuit (CIC) ASIC is a front-end chip for both Pixel-Strip (PS) andStrip-Strip (2S) modules of the future Phase-II CMS Outer Tracker upgrade at the HighLuminosity LHC (HL-LHC). It collects the digital data coming from eight upstream front-endchips (either MPAs or CBCs, depending on the module type), formats the signal in data packetscontaining the trigger information from eight bunch crossings and the raw data from eventspassing the first trigger level, and finally transmits them to the LpGBT unit. The design and itsimplementation in a 65 nm CMOS technology of the first prototype that integrates allfunctionalities for system level operation are presented in this contribution.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.22323/1.343.0099","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9

Abstract

The Concentrator Integrated Circuit (CIC) ASIC is a front-end chip for both Pixel-Strip (PS) andStrip-Strip (2S) modules of the future Phase-II CMS Outer Tracker upgrade at the HighLuminosity LHC (HL-LHC). It collects the digital data coming from eight upstream front-endchips (either MPAs or CBCs, depending on the module type), formats the signal in data packetscontaining the trigger information from eight bunch crossings and the raw data from eventspassing the first trigger level, and finally transmits them to the LpGBT unit. The design and itsimplementation in a 65 nm CMOS technology of the first prototype that integrates allfunctionalities for system level operation are presented in this contribution.
用于HL-LHC CMS外部跟踪探测器升级的65nm数据集中专用集成电路
Concentrator Integrated Circuit (CIC) ASIC是HighLuminosity LHC (HL-LHC)未来二期CMS Outer Tracker升级的Pixel-Strip (PS)和strip - strip (2S)模块的前端芯片。它收集来自8个上游前端芯片(MPAs或CBCs,取决于模块类型)的数字数据,格式化数据包中的信号,其中包含来自8个串交叉的触发信息和来自通过第一个触发级别的事件的原始数据,最后将它们传输到LpGBT单元。本文介绍了第一个集成了系统级操作的所有功能的原型的65纳米CMOS技术的设计和实现。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信