Synthesis of combinational circuits from the truth tables in “Kovcheg” CAD design flow

Abstract

This paper describes the system implemented in “Kovcheg” CAD for integrated circuit design automation. This system allows the user to specify combinational circuits in the form of truth tables. Truth table input values can be specified in automatic mode with a full range of input combinations or in manual mode for specific sets only. The mapping process to the gate array cell library with parameterized constraints as well as the automatic circuit representation of the schematic view in the graphic editor are also described.