Unconventional fabrics, architectures, and models for future multi-core systems

Abstract

Massive level of integration is making modern multi-core chips all-pervasive in several domains. Hence, high performance, robustness, and low power are crucial for the widespread adoption of such platforms. However, achieving all these goals forces us to re-think the basis of designing multi-core systems at nanoscale, starting with the very substrate we need to use to implement such systems in the future, particularly for nanowire (or carbon nanotube) based on-chip interconnect obtained through self-assembly techniques. Due to the lack of control over these processes, such interconnects are expected to be largely unstructured. While large unstructured networks are easy to fabricate, they require unconventional architectures and communication paradigms. For instance, by getting inspiration from many natural systems with network-based architectures, the future multi-core systems at nanoscale are expected to be hierarchical and heterogeneous in nature, as many powerful features such as increased performance, better resource utilization, and an increased robustness against failures of many natural networks come precisely from their heterogeneity, unstructuredness, and hierarchical nature. As such, an important performance limitation of multi-core chips designed with regular network architectures arises from planar metal interconnect-based multi-hop links, where the data transfer between two distant blocks can cause high latency and power consumption.