Real-Time Validation of Fault-Tolerant Mixed-Criticality Systems

Stefano Esposito, J. Sini, M. Violante
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引用次数: 0

Abstract

Modern avionics and space applications are characterized by increasing performance requirements. To satisfy such requirements, the use of commercial-off-the-shelf (COTS) multi-processor system-on-chips (MPSoCs) is a convenient solution. However, such systems are not developed for the avionic use case, therefore a validation approach is in order. In this paper, a validation approach is proposed for fault isolation, detection, and recovery mechanisms applied to mitigate fault effects in mixed-criticality systems. The approach is based on a combination of hardware-in-the-loop testing and fault injection techniques. Experimental results prove that the proposed approach does not interfere with the temporal behavior of the system under-test while allowing a realistic test of the software.
容错混合临界系统的实时验证
现代航空电子和空间应用的特点是性能要求越来越高。为了满足这些需求,使用商用现货(COTS)多处理器片上系统(mpsoc)是一种方便的解决方案。然而,这样的系统不是为航空电子用例开发的,因此验证方法是有序的。本文提出了一种用于减轻混合临界系统故障影响的故障隔离、检测和恢复机制的验证方法。该方法基于硬件在环测试和故障注入技术的结合。实验结果证明,该方法不影响被测系统的时间行为,同时允许对软件进行实际测试。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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