Impact of power density limitation in gigascale integration for the SIMD pixel processor

Abstract

Gigascale Integration (GSI) enables a new generation of monolithic focal plane processing systems built with billion-transistor chips. As this technology matures, fundamental technology limitations on wire interconnects and power dissipation will become the performance bottleneck. This paper presents system performance projections for GSI technologies under these constraints. Architectural models and workload characterization are integrated to identify viable future system implementations. The SIMD Pixel processor (SIMPil) is selected as the architecture for evaluation, and an image processing application suite is programmed to characterize the workload. Projections for SIMPil systems show that over three orders of magnitude improvement is achievable by 2012 in both system throughput and image resolution. System power consumption is contained below 50 W for a 52,900 processor system in 50 nm technology. The SIMPil architecture design space is explored, and opportunities for more aggressive designs within power density limits are examined.