Simple analogue active filter testing using digital modelling

M. H. Leong, A. A'ain
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引用次数: 2

Abstract

This paper presents a new approach to detect analogue catastrophic faults via digital modelling for an analogue filter. Area of interest in this paper is to prove that analogue circuit can be translated into logic gates (0's or 1's) and investigates the effectiveness of analogue fault (short and open) in analogy approximate to digital stuck-at fault model. The purpose of testing fault that connects active component to supply terminal (stuck-at fault) is to investigate the characteristic of the output response, whether can successful model analogue fault to logic level. The approach is to sensitise primary input with an arbitrary frequency square-wave as stimuli and observes output signature in transient and frequency response in order to distinguish Go or No-GO. It is a simple method to accelerate production test without any extra circuitry. This approach has been implemented to a frequency-dependant circuit (Butterworth low pass filter) in order to verify its functionability.
简单的模拟有源滤波器测试使用数字建模
本文提出了一种通过对模拟滤波器进行数字建模来检测模拟灾难性故障的新方法。本文的研究领域是证明模拟电路可以转换为逻辑门(0或1),并研究模拟故障(短开)在近似于数字卡滞故障模型的类比中的有效性。有源元件与电源端连接的故障(卡在故障)测试的目的是研究输出响应的特性,是否能成功地将模拟故障建模到逻辑级。该方法是用任意频率的方波作为刺激敏化主输入,观察输出的瞬态和频率响应特征,以区分Go或No-GO。这是一种简单的加速生产测试的方法,不需要任何额外的电路。该方法已实现到频率相关电路(巴特沃斯低通滤波器),以验证其功能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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