An Approach For Tuning Signal Integrity Properties Of Edge Card Connectors With Conductive Fixture In High-Speed Link Channels

Yanyan Zhang, J. Hejase, M. Bohra, P. Paladhi, Lei Shan, S. Chun, J. Audet, W. Becker, D. Dreps
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引用次数: 0

Abstract

A novel edge card connector design approach with tunable signal integrity (SI) properties is proposed. The tunability is achieved through the presence or absence of a grounded conductive fixture in between the connector pin rows. The main purpose of the tunability is to take an existing connector having a certain impedance intended to work in a high-speed link channel and be able to adjust the impedance of that connector for another channel requiring a different impedance. In this paper, the fixture is designed with a thin metal layer sheet expanding beneath a connector’s pins to provide tunable capacitive coupling between the signal and the ground in order to effectively drop the connector’s impedance from 100ohm to 85ohm. Additionally, it was observed that not only was the impedance tunability achieved for the assumed connector but also improvements in crosstalk and loss potentially extending the operational bandwidth of the connector to higher frequencies. The benefits of the proposed approach are verified by simulations in both frequency-domain and time-domain. A time domain eye simulation of a typical PCIe gen4 SerDes channel designed for 85ohm impedance to work at 16 Gbps shows eye opening improvements of 10.7% and 5.2%, respectively, for the eye height and the eye width when using the tuned connector with the proposed approach.
一种高速链路通道中带导电夹具的边卡连接器信号完整性调谐方法
提出了一种信号完整性可调的边缘卡连接器设计方法。可调性是通过在连接器引脚排之间存在或不存在接地导电夹具来实现的。可调性的主要目的是采用具有一定阻抗的现有连接器,旨在在高速链路通道中工作,并能够为需要不同阻抗的另一个通道调整该连接器的阻抗。在本文中,该夹具被设计为在连接器引脚下方扩展的薄金属层片,以在信号和地之间提供可调谐的电容耦合,从而有效地将连接器的阻抗从100欧姆降至85欧姆。此外,我们观察到,不仅实现了假设连接器的阻抗可调性,而且还改善了串扰和损耗,可能将连接器的工作带宽扩展到更高的频率。通过频域和时域仿真验证了该方法的有效性。对典型的PCIe gen4 SerDes通道进行时域眼睛仿真,设计阻抗为85ohm,工作速度为16 Gbps,结果表明,当使用采用该方法的调谐连接器时,眼睛高度和眼睛宽度分别提高了10.7%和5.2%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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