{"title":"A 380µW Rx, 2.6mW Tx 433MHz FSK transceiver with a 102dB link budget and bit-level duty cycling","authors":"N. Roberts, Michael Kines, D. Wentzloff","doi":"10.1109/RFIC.2015.7337732","DOIUrl":null,"url":null,"abstract":"This paper presents a low-power, long-range 433MHz transceiver designed for 2-FSK modulation at 1kbps in 8 different physical channels capable of communicating with a Texas Instruments CC1101. Designed in a 130nm CMOS process with an area of 1.1mm2, the transmitter's output power is 0dBm and the receiver has a sensitivity of -102dBm producing a link budget >100dB and a theoretical range >5km assuming 1/d2 path loss. Low transmitter power is achieved using a 0.5V Class-E PA and low receiver power is achieved by implementing a digitally-assisted demodulator with further power reduction achieved through bit-level duty cycling with an off power of 110nW.","PeriodicalId":121490,"journal":{"name":"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-05-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2015.7337732","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
This paper presents a low-power, long-range 433MHz transceiver designed for 2-FSK modulation at 1kbps in 8 different physical channels capable of communicating with a Texas Instruments CC1101. Designed in a 130nm CMOS process with an area of 1.1mm2, the transmitter's output power is 0dBm and the receiver has a sensitivity of -102dBm producing a link budget >100dB and a theoretical range >5km assuming 1/d2 path loss. Low transmitter power is achieved using a 0.5V Class-E PA and low receiver power is achieved by implementing a digitally-assisted demodulator with further power reduction achieved through bit-level duty cycling with an off power of 110nW.