Compact models of emerging devices

Abstract

Compact modeling of resistive switching memory (RRAM) and carbon nanotube field-effect transistor (CNFET) are presented. The models are suitable for exploration of device design space, assessment of device performance at the circuit level. Optimization of the CNFET device structure to minimize the gate delay is presented as a demonstration of the model's capability. Simulation of neuromorphic computation system is an example application of the RRAM model. The models can be used to perform advance explorations of circuits and sub-systems of emerging devices prior to the availability of reliable, high-yielding fabrication processes for the emerging devices.