Soft Voting-Based Ensemble Approach to Predict Early Stage DRC Violations

Riadul Islam, Md Asif Shahjalal
{"title":"Soft Voting-Based Ensemble Approach to Predict Early Stage DRC Violations","authors":"Riadul Islam, Md Asif Shahjalal","doi":"10.1109/MWSCAS.2019.8884896","DOIUrl":null,"url":null,"abstract":"Reducing human effort and design schedule time is facing a tremendous challenge from the cutting- edge technology node, which hinders profitability from IC manufacturing. Initiatives like DARPA IDEA have addressed this challenge by aiming for a 24-hour design turnaround time, maximum resource utilization, and productivity of ICs. In this paper, we proposed a robust ensemble learning model to predict DRC from the placement stage, which precisely predicts design routability and DRC hotspots of a design. The proposed algorithm uses a soft voting classifier to combine random forest and gradient boosting algorithms. Our approach achieved a maximum precision, recall, and F1 score of 97%, 97%, and 96%, respectively, which are significantly better than the state- of-the-art support-vector machine (SVM)-based prediction scheme.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"107 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2019.8884896","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12

Abstract

Reducing human effort and design schedule time is facing a tremendous challenge from the cutting- edge technology node, which hinders profitability from IC manufacturing. Initiatives like DARPA IDEA have addressed this challenge by aiming for a 24-hour design turnaround time, maximum resource utilization, and productivity of ICs. In this paper, we proposed a robust ensemble learning model to predict DRC from the placement stage, which precisely predicts design routability and DRC hotspots of a design. The proposed algorithm uses a soft voting classifier to combine random forest and gradient boosting algorithms. Our approach achieved a maximum precision, recall, and F1 score of 97%, 97%, and 96%, respectively, which are significantly better than the state- of-the-art support-vector machine (SVM)-based prediction scheme.
基于软投票的集成方法预测早期DRC违规
减少人力投入和缩短设计进度面临着来自尖端技术节点的巨大挑战,这阻碍了集成电路制造的盈利。像DARPA IDEA这样的计划通过瞄准24小时的设计周转时间、最大的资源利用率和集成电路的生产力来解决这一挑战。在本文中,我们提出了一个鲁棒集成学习模型来预测DRC,该模型可以精确地预测设计的可达性和DRC热点。该算法采用软投票分类器将随机森林算法与梯度增强算法相结合。我们的方法分别实现了97%、97%和96%的最大精度、召回率和F1分数,这明显优于最先进的基于支持向量机(SVM)的预测方案。
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