Strain enhanced low-VT CMOS featuring La/Al-doped HfSiO/TaC and 10ps invertor delay

2008 Symposium on VLSI Technology Pub Date : 2008-06-17 DOI:10.1109/VLSIT.2008.4588590

S. Kubicek, T. Schram, E. Rohr, V. Paraschiv, R. Vos, M. Demand, C. Adelmann, T. Witters, L. Nyns, A. Delabie, L. Ragnarsson, T. Chiarella, C. Kerner, A. Mercha, B. Parvais, M. Aoulaiche, C. Ortolland, H. Yu, A. Veloso, L. Witters, R. Singanamalla, T. Kauerauf, S. Brus, C. Vrancken, V. Chang, S. Chang, R. Mitsuhashi, Y. Okuno, A. Akheyar, H. Cho, J. Hooker, B. O’Sullivan, S. Van Elshocht, K. De Meyer, M. Jurczak, P. Absil, S. Biesemans, T. Hoffmann

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引用次数: 7

Abstract

We discuss several advancements over our previous report (S. Kubicek, 2006): - Introduction of conventional stress boosters resulting in 16% and 11% for nMOS and pMOS respectively. For the first time the compatibility of SMT (stress memorization technique) with high-kappa/metal gate is demonstrated. In addition, we developed a blanket SMT process that does not require a photo to protect the pMOS by selecting a hydrogen-rich SiN film. - A comprehensive study of HfSiO and HfO2 as function of La/Al doping and spike/laser annealing. Parameters studied include Vt tuning, reliability and process control. - Demonstration of fast invertor delay of 10 ps including high frequency response analysis revealing the negative impact of high metal sheet resistance and parasitic metal-poly interface oxide.

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应变增强低vt CMOS，具有La/ al掺杂HfSiO/TaC和10ps逆变器延迟

我们讨论了我们之前的报告(S. Kubicek, 2006)的几个进步:-引入传统的压力助推器，分别使nMOS和pMOS分别降低16%和11%。首次证明了应力记忆技术与高kappa/金属栅极的相容性。此外，我们开发了一种不需要照片的毯子SMT工艺，通过选择富氢的SiN薄膜来保护pMOS。-全面研究了La/Al掺杂和脉冲/激光退火对HfSiO和HfO2的影响。研究的参数包括Vt整定、可靠性和过程控制。-演示10 ps的快速逆变器延迟，包括高频响应分析，揭示了高金属片电阻和寄生金属-聚界面氧化物的负面影响。

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2008 Symposium on VLSI Technology

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