{"title":"A Calibration Circuit for Reconfigurable Smart ADC for Biomedical Signal Processing","authors":"S. Mostafa, W. Qu, S. Islam, M. Mahfouz","doi":"10.1109/ISVLSI.2010.85","DOIUrl":null,"url":null,"abstract":"Reconfigurable analog-to-digital converters (ADC) have been receiving increased attention in the research community for the capability to adapt to continuously varying signal processing requirements. The reconfigurable ADC is particularly advantageous in implantable biomedical sensor signal processing systems that processes signal in different range of frequency and amplitude levels and has low power consumption constraints. In this work a calibration circuit is presented that analyses the input signal from biomedical sensors and based on the dynamic range and frequency of the signal generates a two-bit control signal to change the configuration of the ADC for optimum resolution and power consumption. The two-bit control signal reconfigures the 10-bit 40MSPS pipeline ADC to operate in four different configurations by changing resolution, sampling clock and bias current for optimized operation. The calibration circuit is designed in 90 nm process and requires only 36.9μA current with 1V power supply and occupies 0.0054mm2 chip area. The reconfigurable ADC is designed in a 0.35 μm bulk CMOS process occupying 1.9mm2 area and consumes 35.4mW power in maximum performance configuration and 7.9mW in minimum power consumption configuration.","PeriodicalId":187530,"journal":{"name":"2010 IEEE Computer Society Annual Symposium on VLSI","volume":"72 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE Computer Society Annual Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI.2010.85","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Reconfigurable analog-to-digital converters (ADC) have been receiving increased attention in the research community for the capability to adapt to continuously varying signal processing requirements. The reconfigurable ADC is particularly advantageous in implantable biomedical sensor signal processing systems that processes signal in different range of frequency and amplitude levels and has low power consumption constraints. In this work a calibration circuit is presented that analyses the input signal from biomedical sensors and based on the dynamic range and frequency of the signal generates a two-bit control signal to change the configuration of the ADC for optimum resolution and power consumption. The two-bit control signal reconfigures the 10-bit 40MSPS pipeline ADC to operate in four different configurations by changing resolution, sampling clock and bias current for optimized operation. The calibration circuit is designed in 90 nm process and requires only 36.9μA current with 1V power supply and occupies 0.0054mm2 chip area. The reconfigurable ADC is designed in a 0.35 μm bulk CMOS process occupying 1.9mm2 area and consumes 35.4mW power in maximum performance configuration and 7.9mW in minimum power consumption configuration.