A Calibration Circuit for Reconfigurable Smart ADC for Biomedical Signal Processing

S. Mostafa, W. Qu, S. Islam, M. Mahfouz
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Abstract

Reconfigurable analog-to-digital converters (ADC) have been receiving increased attention in the research community for the capability to adapt to continuously varying signal processing requirements. The reconfigurable ADC is particularly advantageous in implantable biomedical sensor signal processing systems that processes signal in different range of frequency and amplitude levels and has low power consumption constraints. In this work a calibration circuit is presented that analyses the input signal from biomedical sensors and based on the dynamic range and frequency of the signal generates a two-bit control signal to change the configuration of the ADC for optimum resolution and power consumption. The two-bit control signal reconfigures the 10-bit 40MSPS pipeline ADC to operate in four different configurations by changing resolution, sampling clock and bias current for optimized operation. The calibration circuit is designed in 90 nm process and requires only 36.9μA current with 1V power supply and occupies 0.0054mm2 chip area. The reconfigurable ADC is designed in a 0.35 μm bulk CMOS process occupying 1.9mm2 area and consumes 35.4mW power in maximum performance configuration and 7.9mW in minimum power consumption configuration.
用于生物医学信号处理的可重构智能ADC校准电路
可重构模数转换器(ADC)因其适应不断变化的信号处理要求的能力而受到研究界越来越多的关注。可重构ADC在可植入生物医学传感器信号处理系统中具有特别的优势,该系统处理不同频率和幅度水平范围的信号,并且具有低功耗限制。在这项工作中,提出了一种校准电路,该电路分析来自生物医学传感器的输入信号,并根据信号的动态范围和频率产生一个两位控制信号,以改变ADC的配置,以获得最佳的分辨率和功耗。两位控制信号通过改变分辨率、采样时钟和偏置电流,将10位40MSPS流水线ADC重新配置为四种不同的配置,以优化操作。校准电路采用90nm工艺设计,仅需36.9μA电流,电源为1V,芯片面积为0.0054mm2。该可重构ADC采用0.35 μm块体CMOS工艺设计,占地1.9mm2,最大性能配置功耗为35.4mW,最小功耗为7.9mW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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