W. Pleskacz, T. Borejko, T. Gugala, P. Pizon, V. Stopjaková
{"title":"DefSim - the educational integrated circuit for defect simulation","authors":"W. Pleskacz, T. Borejko, T. Gugala, P. Pizon, V. Stopjaková","doi":"10.1109/MSE.2005.24","DOIUrl":null,"url":null,"abstract":"The educational integrated circuit, DefSim, is described. This chip is dedicated to the development of students' skills in fault simulation and test pattern generation for digital circuits. It allows applying both voltage and current test methods and offers comparing of their efficiencies on basic digital circuit examples. DefSim was manufactured and its operation was verified experimentally.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MSE.2005.24","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
The educational integrated circuit, DefSim, is described. This chip is dedicated to the development of students' skills in fault simulation and test pattern generation for digital circuits. It allows applying both voltage and current test methods and offers comparing of their efficiencies on basic digital circuit examples. DefSim was manufactured and its operation was verified experimentally.