{"title":"An adaptive carrier synchronizer for M-QAM cable receiver","authors":"Chun-Nan Ke, Cheng-Yi Huang, Chih-Peng Fan","doi":"10.1109/ICCE.2003.1218930","DOIUrl":null,"url":null,"abstract":"A phase-locked loop is commonly used for carrier synchronization in a communication receiver. A carrier synchronizer with an adaptive loop bandwidth for rapid carrier frequency offset acquisition and low steady-state jitter is proposed. The new carrier recovery loop consists of a tracking-status detector and a loop bandwidth controller. The tracking-status detector monitors the frequency-estimate signal output from the loop filter, determining whether the residual carrier frequency offset is locked or not. Then, by adjusting the loop bandwidth, it can reduce the convergence time of the acquisition-state and carrier jitter of the steady state. The new scheme, implemented by FPGAs, has been successfully applied to a 256-QAM baseband digital receiver and inter-operated with commercial CMTSs. Only around 11200 gates are needed for the new carrier synchronizer; however, the SNR can be improved by up to 3 dB.","PeriodicalId":319221,"journal":{"name":"2003 IEEE International Conference on Consumer Electronics, 2003. ICCE.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2003 IEEE International Conference on Consumer Electronics, 2003. ICCE.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCE.2003.1218930","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16
Abstract
A phase-locked loop is commonly used for carrier synchronization in a communication receiver. A carrier synchronizer with an adaptive loop bandwidth for rapid carrier frequency offset acquisition and low steady-state jitter is proposed. The new carrier recovery loop consists of a tracking-status detector and a loop bandwidth controller. The tracking-status detector monitors the frequency-estimate signal output from the loop filter, determining whether the residual carrier frequency offset is locked or not. Then, by adjusting the loop bandwidth, it can reduce the convergence time of the acquisition-state and carrier jitter of the steady state. The new scheme, implemented by FPGAs, has been successfully applied to a 256-QAM baseband digital receiver and inter-operated with commercial CMTSs. Only around 11200 gates are needed for the new carrier synchronizer; however, the SNR can be improved by up to 3 dB.