Built-in self-test for high-speed data-path circuitry

Abstract

A practical application and case s,tudy of a Built-In Self-Test (BIST) technique for high-speed data-path circuitry is described. The approach has been implemented in six VLSI devices developed for broadband packet switching applications. The technique provides high fault coverage (> 90%) with low area overhead penalty (< 4%) and no impact to performance. The BIST approach is used for all levels of testing and, at the system level, performs full circuit board BIST with diagnostic resolution to the faulty component or interconnect.