H. Lakdawala, J.-H.C. Zhan, A. Ravi, S. Anderson, Brent R. Carlton, R.B. Nicholls, N. Yaghini, R. Bishop, Stewart S. Taylor, K. Soumyanath
{"title":"Multi-Band (1-6GHz), Sampled, Sliding-IF Receiver with Discrete-Time Filtering in 90nm Digital CMOS Process","authors":"H. Lakdawala, J.-H.C. Zhan, A. Ravi, S. Anderson, Brent R. Carlton, R.B. Nicholls, N. Yaghini, R. Bishop, Stewart S. Taylor, K. Soumyanath","doi":"10.1109/VLSIC.2006.1705394","DOIUrl":null,"url":null,"abstract":"A prototype 1-6GHz multi-band sampled sliding-IF receiver with discrete-time channel select filtering in a 90nm low resistivity substrate, strained-Si digital CMOS process is presented. The core receiver has an inductor-less wideband LNA front-end, a sampled mixer, and a combination of programmable poly-phase FIR and IIR filter for baseband filtering. The receiver achieves a noise figure (NF) of <13.5dB and IIP3 of >-19dBm for bands between 1-6GHz. The receiver when used in a system with an external tuned LNA (2.5dB NF) on the front end module achieves NF of <7dB, and IIP3 of >-34dBm for the WiFi bands. The die area for the entire receiver is 0.8mm2 and consumes 89mW","PeriodicalId":366835,"journal":{"name":"2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2006.1705394","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 18
Abstract
A prototype 1-6GHz multi-band sampled sliding-IF receiver with discrete-time channel select filtering in a 90nm low resistivity substrate, strained-Si digital CMOS process is presented. The core receiver has an inductor-less wideband LNA front-end, a sampled mixer, and a combination of programmable poly-phase FIR and IIR filter for baseband filtering. The receiver achieves a noise figure (NF) of <13.5dB and IIP3 of >-19dBm for bands between 1-6GHz. The receiver when used in a system with an external tuned LNA (2.5dB NF) on the front end module achieves NF of <7dB, and IIP3 of >-34dBm for the WiFi bands. The die area for the entire receiver is 0.8mm2 and consumes 89mW