Design of Compact Integrated Photonic Crystal NAND and NOR Logic Gates

L. P. Caballero, M. Povinelli, J. Ramirez, P. Guimarães, O. V. Neto
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引用次数: 5

Abstract

Here we propose an integrated and compact photonic crystal (PhC) device that can operate as a NAND or NOR logic gate. It is designed in a PhC slab composed of GaAs/AlGaAs heterostructure and a 2D pattern of a triangular lattice of holes. By modifying target holes on the structure, the NAND or NOR gates are achieved. They are universal logic functions, which means that any logic function can be accomplished by connecting them. We perform simulations through the FDTD method to prove the correct operation of our integrated and compact device. The simulation results show that the upper power limit to represent the logic 0 is $0.17P_{in}$, where Pin is the input power. On the other hand, the lower power limit to represent the logic 1 is found to be $0.50P_{in}$. The NAND and NOR logic gates implemented here present a response time of 5 ps, resulting in a clock rate of 200 GHz. They also operate within the C band of the telecommunication window. Finally, we highlight that our integrated and compact PhC device has great potential to be microfabricated as it is based on a practical and efficient approach for fabrication. It also can be incorporated easily on integrated photonics technology.
紧凑集成光子晶体NAND和NOR逻辑门的设计
在这里,我们提出了一个集成和紧凑的光子晶体(PhC)器件,可以作为NAND或NOR逻辑门工作。它被设计在由GaAs/AlGaAs异质结构和二维三角形孔晶格组成的PhC板上。通过改变结构上的目标孔,可以实现NAND或NOR门。它们是通用的逻辑函数,这意味着任何逻辑函数都可以通过连接它们来完成。通过时域有限差分法进行仿真,验证了该集成紧凑器件的正确性。仿真结果表明,表示逻辑0的功率上限为0.17P_{in}$,其中Pin为输入功率。另一方面,表示逻辑1的功率下限为$0.50P_{in}$。这里实现的NAND和NOR逻辑门的响应时间为5ps,导致时钟速率为200ghz。它们也在电信窗口的C波段内工作。最后,我们强调我们的集成和紧凑的PhC设备具有巨大的微制造潜力,因为它基于实用和高效的制造方法。它也可以很容易地集成到集成光子技术中。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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