Router-level performance driven dynamic management in hierarchical networks-on-chip

Abstract

When on-chip interconnection network scales to integrate more processing elements, the average end-to-end latency is highly increased due to long average hop distance. Though it has been discovered that, almost of the communication in large scale networks is between nodes in a short range, it revealed that the small portion of data delivery between distant nodes consumes or occupies most of the network bandwidth. Hierarchical NoCs caters an attractive solution to resolve the distant data transmission problem by taking advantage of the network hierarchy. However, it brings about new sever congestion challenge because of uneven traffic distribution among hierarchy. In previous work, we performed a detouring scheme on a layered hierarchical NoC. When congestion is formed on the access link to adjacent hierarchical layer, the detouring scheme seeks and reroutes the packets to an nearby node to access the next adjacent network layer. It revealed that the links, which bridges the packets up to higher layers, are more essential for distributing the traffic and avoiding congestion between hierarchy levels. In this paper, we proposed dynamic schemes to solve the congestion problem introduced by region-based hierarchical routing on a hierarchical NoC. The results exposed that the dynamic approaches are efficient to manage the congestion under heavier long range traffic load, yielding significant average network latency reduction and throughput increment under mixed synthetic traffic patterns.