A New Insight into the Saturation Phenomenon in Nanosheet Transistor: A Device Optimization Perspective

Abstract

The extension region and its electrostatics play a critical role in charge modulation in Nanosheet FET, thus, providing a unique insight into the saturation phenomenon. In this paper, we analyzed the behavior of saturation voltage (VDSAT) and saturation current $(\mathrm{I}_{\text{DSAT}})$ in a stacked Nanosheet (NSFET) using well-calibrated TCAD models. Through extensive simulations, we optimized the NSFET with varying device dimensions to find the suitable design parameters that can ensure the saturation condition and, thus, offers a reliable operation of NSFET-based analog circuits.