An ultra-low-voltage Class-C PMOS VCO IC with PVT compensation in 180-nm CMOS

Xin Yang, Xiao Xu, T. Yoshimasu
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引用次数: 5

Abstract

A novel 2.2-GHz-band ultra-low-voltage Class-C PMOS VCO IC with negative reference and amplitude feedback loop is proposed. The negative reference initially adapts a sufficient bias for the LC-VCO circuit to ensure a robust oscillation start-up. The feedback loop then adaptively controls the bias condition of LC-VCO for Class-C operation in steady-state. The reliability of the feedback loop is enhanced over PVT variation. The Class-C VCO IC has been designed, fabricated and fully evaluated in 180-nm CMOS technology. The fabricated VCO IC exhibits a measured phase noise of -113.2 dBc/Hz at 1 MHz offset from the 2.2 GHz carrier frequency with a supply voltage of only 0.3 V.
一种带PVT补偿的超低电压c类PMOS VCO集成电路
提出了一种新型的2.2 ghz频段超低电压c类PMOS压控振荡器,具有负基准和幅值反馈回路。负基准最初为LC-VCO电路适应足够的偏置,以确保稳健的振荡启动。反馈回路自适应控制LC-VCO的偏置条件,使c类工作在稳态状态下。反馈回路的可靠性随着PVT的变化而增强。c级VCO集成电路已在180纳米CMOS技术中设计,制造和全面评估。所制备的VCO集成电路在电源电压仅为0.3 V时,在2.2 GHz载波频率偏移1 MHz时的相位噪声为-113.2 dBc/Hz。
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