C. Neve, K. Ben Alia, C. Malaquin, F. Allibert, E. Desbonnets, I. Bertrand, W. Van Den Daele, J. Raskin
{"title":"RF and linear performance of commercial 200 mm trap-rich HR-SOI wafers for SoC applications","authors":"C. Neve, K. Ben Alia, C. Malaquin, F. Allibert, E. Desbonnets, I. Bertrand, W. Van Den Daele, J. Raskin","doi":"10.1109/SIRF.2013.6489417","DOIUrl":null,"url":null,"abstract":"We present for the first time the RF and linear performance of commercial 200 mm trap-rich HR-SOI wafers. These wafers are fully compatible with the thermal budget of CMOS process. The investigated SOI wafers with a fixed BOX of 400 nm-thick show effective resistivity values higher than 4 kΩ-cm and harmonic distortion levels lower than -81 dBm for a 900 MHz input signal with +15 dBm, i.e. more than 95 dBc. Our investigations confirm the capability of trap-rich HR-SOI wafer for the integration of RF systems in Si.","PeriodicalId":286070,"journal":{"name":"2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIRF.2013.6489417","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 17
Abstract
We present for the first time the RF and linear performance of commercial 200 mm trap-rich HR-SOI wafers. These wafers are fully compatible with the thermal budget of CMOS process. The investigated SOI wafers with a fixed BOX of 400 nm-thick show effective resistivity values higher than 4 kΩ-cm and harmonic distortion levels lower than -81 dBm for a 900 MHz input signal with +15 dBm, i.e. more than 95 dBc. Our investigations confirm the capability of trap-rich HR-SOI wafer for the integration of RF systems in Si.