CMOS subnanosecond true-ECL output buffer

E. Seevinck, J. Dikken, H. Schumacher
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引用次数: 21

Abstract

Abstruct -An emitter coupled logic (ECL) lOOK compatible output buffer circuit fabricated in a submicrometer CMOS-only process is presented. High speed (0.9-11s delay) and sufficient precision are achieved through the use of a new circuit principle. Negative feedback and an error correction technique are applied in such a way that external components and/or additional power supplies are not required. Aspects of stability and accuracy are investigated and simulation results are discussed to explain the new circuit technique. The actual design and practical aspects of it, such as layout, implementation in silicon, as well as technology features, are shown. Measured results and simulation results, showing the good performance of the ECL output buffer across a wide range of capacitive loading, are presented.
CMOS亚纳秒真ecl输出缓冲器
摘要:提出了一种基于亚微米cmos工艺的发射极耦合逻辑(ECL) lOOK兼容输出缓冲电路。采用了一种新的电路原理,实现了高速度(延迟0.9-11s)和足够的精度。负反馈和纠错技术的应用方式使外部组件和/或额外的电源不需要。从稳定性和精度两个方面进行了研究,并讨论了仿真结果来说明新电路技术。文中给出了该系统的实际设计和实用方面,如布局、在硅片上的实现以及技术特点。测量结果和仿真结果表明,ECL输出缓冲器在大范围容性负载下具有良好的性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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