K. Wong, A. Yeung, Ka-Cheng Choi, Philip Lei, C. Lam
{"title":"Exact Transient Analysis on LRU Cache Startup for Internet of Things","authors":"K. Wong, A. Yeung, Ka-Cheng Choi, Philip Lei, C. Lam","doi":"10.1145/3512576.3512632","DOIUrl":null,"url":null,"abstract":"Transient analysis is particularly beneficial to the design of the cache used in Internet of Things as they are turned on and off frequently. Least-Recently-Used (LRU) cache has been studied extensively in the past decades. However, most of the previous studies only focus on stead state analysis. In this paper, an exact transient analysis on LRU cache startup is presented. Starting with an empty content, a LRU cache is filled up with objects. During this transient process, two key performance measures are studied: cache occupancy and cache miss probability. These measures are useful in providing insights such as how long a cache takes to become fully occupied, and how quickly a cache reaches its acceptable cache miss probability. In this study, exact analytical results on these two measures are presented.","PeriodicalId":278114,"journal":{"name":"Proceedings of the 2021 9th International Conference on Information Technology: IoT and Smart City","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2021 9th International Conference on Information Technology: IoT and Smart City","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3512576.3512632","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Transient analysis is particularly beneficial to the design of the cache used in Internet of Things as they are turned on and off frequently. Least-Recently-Used (LRU) cache has been studied extensively in the past decades. However, most of the previous studies only focus on stead state analysis. In this paper, an exact transient analysis on LRU cache startup is presented. Starting with an empty content, a LRU cache is filled up with objects. During this transient process, two key performance measures are studied: cache occupancy and cache miss probability. These measures are useful in providing insights such as how long a cache takes to become fully occupied, and how quickly a cache reaches its acceptable cache miss probability. In this study, exact analytical results on these two measures are presented.