1 V CMOS instrumentation amplifier with high DC electrode offset cancellation for ECG acquisition systems

C. Nanda, J. Mukhopadhyay, Debashis Mandal, S. Chakrabarti
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引用次数: 19

Abstract

A new circuit topology for a low voltage, low noise instrumentation amplifier (IA) applicable for electrocardiogram signal acquisition system is designed. This circuit is based on the current feedback topology, which is implemented using folded cascode structure at both input and output stages. This helps to sense very low common mode voltage. Achieved input common mode range (ICMR) is 71.43 – 700 mV. DC electrode offset cancellation circuit is realized to remove DC electrode offset along with the low frequency noise. The IA can withstand a high DC electrode offset of ±18 mV. It also has a wide input dynamic range of ±1 µV to ±1 mV. The voltage gain is around 38 dB. It consumes 110 µW power with a supply voltage of 1 V. A high common mode rejection ratio (CMRR) of 80 dB is achieved. The integrated input referred noise is 1.64 µVrms (0.1 Hz – 150 Hz). This design is implemented in 0.18 µm standard CMOS process.
用于心电采集系统的高直流电极偏移抵消的1v CMOS仪表放大器
设计了一种适用于心电图信号采集系统的低电压、低噪声仪表放大器的新型电路拓扑结构。该电路基于电流反馈拓扑,在输入和输出级均采用折叠级联结构实现。这有助于感应非常低的共模电压。实现的输入共模范围(ICMR)为71.43 - 700 mV。实现了直流电极偏移抵消电路,消除了直流电极偏移和低频噪声。IA可以承受±18 mV的高直流电极偏移。它还具有±1 μ V至±1 mV的宽输入动态范围。电压增益约为38 dB。功耗为110µW,电源电压为1v。实现了80db的高共模抑制比(CMRR)。综合输入参考噪声为1.64µVrms (0.1 Hz ~ 150hz)。本设计采用0.18µm标准CMOS工艺实现。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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