{"title":"Evaluating deep trench profile by Fourier Transform Infrared spectroscopy","authors":"M. Wang, T. Cheng, Chung-I Chang, Tings Wang","doi":"10.1109/ASMC.2006.1638741","DOIUrl":null,"url":null,"abstract":"As design rule shrinking, it's more challenged to keep the enough capacitance for DRAM device requirement. For deep trench DRAM, one of methods supplied enough capacitance of providing deeper trench. Currently, the trench depth is over 6 mum for the 512M DRAM. In order to meet this stringent requirement, we need to care about not only the profile of deep trench (DT) but also the enough depth. Due to this high aspect ratio process is roughly over 60, it is very difficult for current inline defect monitor's method to check the abnormal trench profile. Traditional methods for verifying DT profile must destroy the wafer by the physical failure analysis. The wafer is analyzed by SEM (scanning electron microscope) to check DT cross-section or FIB (focus ion beam) to inspect slice view image. These methods provide difficultly the whole wafer map message for DT profile, offering merely random-cross-section inspection. Now we provide an inline-fast-effective method by the IR spectrum's analysis that can give the available message to monitor the DT profile","PeriodicalId":407645,"journal":{"name":"The 17th Annual SEMI/IEEE ASMC 2006 Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 17th Annual SEMI/IEEE ASMC 2006 Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASMC.2006.1638741","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
As design rule shrinking, it's more challenged to keep the enough capacitance for DRAM device requirement. For deep trench DRAM, one of methods supplied enough capacitance of providing deeper trench. Currently, the trench depth is over 6 mum for the 512M DRAM. In order to meet this stringent requirement, we need to care about not only the profile of deep trench (DT) but also the enough depth. Due to this high aspect ratio process is roughly over 60, it is very difficult for current inline defect monitor's method to check the abnormal trench profile. Traditional methods for verifying DT profile must destroy the wafer by the physical failure analysis. The wafer is analyzed by SEM (scanning electron microscope) to check DT cross-section or FIB (focus ion beam) to inspect slice view image. These methods provide difficultly the whole wafer map message for DT profile, offering merely random-cross-section inspection. Now we provide an inline-fast-effective method by the IR spectrum's analysis that can give the available message to monitor the DT profile