LLPA: Logic State Based Leakage Power Analysis

Abstract

Numerous side-channel attacks on integrated circuit implementations of cryptographic systems have been demonstrated in literature. Insecure implementations can reveal secret information through data dependencies in dynamic and leakage power profiles. Side-channel resistant logic styles are effective against dynamic power analysis attacks, but are suggested to exhibit weaknesses against the less common Leakage Power Analysis (LPA) attacks. We present a novel LPA attack that uses knowledge of a circuit's internal structure to mount a stronger attack via the leakage power side-channel, and show that even dual-rail side-channel resistant logic styles are susceptible to these LPA attacks. Our proposed LPA attack can successfullyextract secret key information from S-boxes even in the presenceof large amounts of random on-chip noise, and in scenarioswhere Hamming-weight based techniques are unsuitable. We alsoevaluate the impact of process variations on our scheme, andpropose strategies for mitigating this impact.