K. Usami, Shunsuke Kogure, Yusuke Yoshida, Ryo Magasaki, H. Amano
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引用次数: 3
Abstract
This paper proposes a level-shifter free (LSF) approach for multi-VDD design to employ a combination of body bias control and a superior threshold-voltage (Vt) modulation capability of SOTB (Silicon on Thin BOX) devices. We applied this approach to a microprocessor test chip with low-voltage (VDDL) and high-voltage (VDDH) domains, and fabricated it in a 65nm SOTB technology. Measurement results demonstrated that the chip correctly operates at VDDL=0.6V and VDDH=1.2V under the reverse-body-bias (RBB) of 2V for pMOS transistors in the VDDH domain while suppressing the static dc current.