Fault injection analysis of transient faults in clustered VLIW processors

Abstract

VLIW architectures are widely employed in several embedded signal applications mainly because they offer the opportunity to gain high computational performances while maintaining reduced clock rate and power consumption. Recently, VLIW processors became more and more suitable to be employed in various embedded processing systems including safety critical applications such as aerospace, automotive and rail transport. Therefore, techniques to effectively estimate and improve the reliability of VLIW processor are of great interest. Terrestrial safety-critical applications based on newer nano-scale technologies raise increasing concerns about transient errors induced by neutrons. In this paper, we analyze the cross-domain failures affecting redundant mitigation techniques implemented on a statistically scheduled data path VLIW processor and we describe a fault injection analysis of transient faults affecting the r-VEX VLIW processor implemented on an FPGA platform. For a large set of benchmark applications, figures of application performances and errors analysis are provided and commented.