{"title":"Up-diffused I2L, a high speed bipolar LSI process","authors":"D. McGreivy, B. B. Roesner","doi":"10.1109/IEDM.1976.189044","DOIUrl":null,"url":null,"abstract":"I2L (Integrated Injection Logic) or MTL (Merged Transistor Logic) is generally considered a low power, medium speed logic technology with high packing density. The standard double diffused structures presently used cannot yield the high speeds necessary for many circuits. However, improvements in the NPN transistor doping profile by \"up-diffusing\" a buried layer P base during N epi growth have greatly increased the speed of I2L circuits. Also, fan out and drive capabilities are improved since transistors fabricated with this process yield betas of over 200 and breakdown voltages of 7 to 10 volts. This compares to standard I2L transistors with betas of 10 and breakdown voltages of 4 volts. Further advantages of the up-diffused I2L are the ease with which Schottky diodes (both for isolation and collector base clamps) and oxide isolation can be incorporated. Junction isolated devices with standard 5 micron geometries yield minimum gate delays of 2.4 nsecs and typical minimum power-delay products of under 0.2 pJ.","PeriodicalId":106190,"journal":{"name":"1976 International Electron Devices Meeting","volume":"395 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1976 International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.1976.189044","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
I2L (Integrated Injection Logic) or MTL (Merged Transistor Logic) is generally considered a low power, medium speed logic technology with high packing density. The standard double diffused structures presently used cannot yield the high speeds necessary for many circuits. However, improvements in the NPN transistor doping profile by "up-diffusing" a buried layer P base during N epi growth have greatly increased the speed of I2L circuits. Also, fan out and drive capabilities are improved since transistors fabricated with this process yield betas of over 200 and breakdown voltages of 7 to 10 volts. This compares to standard I2L transistors with betas of 10 and breakdown voltages of 4 volts. Further advantages of the up-diffused I2L are the ease with which Schottky diodes (both for isolation and collector base clamps) and oxide isolation can be incorporated. Junction isolated devices with standard 5 micron geometries yield minimum gate delays of 2.4 nsecs and typical minimum power-delay products of under 0.2 pJ.