Testing in the Year 2020

R. Galivanche, R. Kapur, A. Rubio
{"title":"Testing in the Year 2020","authors":"R. Galivanche, R. Kapur, A. Rubio","doi":"10.1109/DATE.2007.364417","DOIUrl":null,"url":null,"abstract":"Testing today of a several hundred million transistor system-on-chip with analog, RF blocks, many processor cores and tens of memories is a huge task. What the test technology be like in year 2020 with hundreds of billions of transistors on a single chip? Can we get there with tweaks to today's technology? While the exact nature of the circuit styles, architectural innovations and product innovations in year 2020 are highly speculative at this point, we examine the impact of likely design and process technology trends on testing methods","PeriodicalId":298961,"journal":{"name":"2007 Design, Automation & Test in Europe Conference & Exhibition","volume":"74 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 Design, Automation & Test in Europe Conference & Exhibition","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DATE.2007.364417","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

Testing today of a several hundred million transistor system-on-chip with analog, RF blocks, many processor cores and tens of memories is a huge task. What the test technology be like in year 2020 with hundreds of billions of transistors on a single chip? Can we get there with tweaks to today's technology? While the exact nature of the circuit styles, architectural innovations and product innovations in year 2020 are highly speculative at this point, we examine the impact of likely design and process technology trends on testing methods
2020年的考试
如今,测试数亿晶体管片上系统(包含模拟、射频模块、许多处理器核心和数十个存储器)是一项艰巨的任务。在2020年,单芯片上有数千亿晶体管的测试技术会是什么样子?我们能否通过对当今技术的调整来实现这一目标?虽然2020年电路风格、架构创新和产品创新的确切性质在这一点上是高度推测的,但我们研究了可能的设计和工艺技术趋势对测试方法的影响
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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