{"title":"A system-level reuse methodology for embedded data-dominated applications","authors":"F. Vermeulen, F. Catthoor, D. Verkest, H. de Man","doi":"10.1109/SIPS.1998.715817","DOIUrl":null,"url":null,"abstract":"This paper presents a system-level reuse methodology for data-dominated applications. A formalism is developed that structures the algorithmic specification in parts combining arithmetic and low-level control constructs that can be reused at the structural VHDL level without change and parts that combine the costly data-access-related constructs which are kept at higher levels in the code hierarchy. In this way, they retain the essential part of the design exploration freedom such that a global system-level data transfer and storage exploration phase can still be applied. The important power and area savings resulting from our approach compared to a traditional approach with fully predefined reusable blocks, are illustrated on examples of the video and modem world.","PeriodicalId":151031,"journal":{"name":"1998 IEEE Workshop on Signal Processing Systems. SIPS 98. Design and Implementation (Cat. No.98TH8374)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 IEEE Workshop on Signal Processing Systems. SIPS 98. Design and Implementation (Cat. No.98TH8374)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIPS.1998.715817","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper presents a system-level reuse methodology for data-dominated applications. A formalism is developed that structures the algorithmic specification in parts combining arithmetic and low-level control constructs that can be reused at the structural VHDL level without change and parts that combine the costly data-access-related constructs which are kept at higher levels in the code hierarchy. In this way, they retain the essential part of the design exploration freedom such that a global system-level data transfer and storage exploration phase can still be applied. The important power and area savings resulting from our approach compared to a traditional approach with fully predefined reusable blocks, are illustrated on examples of the video and modem world.