An effective methodology for robust design of monolithic voltage regulators

P. Napolitano, K. Kelliher, B. A. Mukhtar, Diarmuid Carey, Owen Cregg
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引用次数: 5

Abstract

A procedure for the design of fully integrated voltage regulators is proposed in this paper, for applications requiring high levels of reliability and robustness. A sensitivity analysis is presented, showing how variations in the values of the components, used for the compensation, affect the loop transfer function. To mitigate the effect of process variations and uncertainty in the inductances and capacitances of the output filter, a smart programmable compensation scheme is proposed. The described technique has been verified through transistor level simulations, considering a multiphase buck converter, operated at 1.2-MHz switching frequency, supplied by a 5-V input and generating a 1-V regulated output. The regulator has been designed in a 0.25-μm CMOS technology and occupies a layout area of 0.36-mm2. Without loss of generality, the proposed methodology can be extended to other types of dc-dc switching regulators, single-phase or multi-phase in voltage mode.
一种有效的单片稳压器稳健设计方法
本文提出了一种完全集成电压调节器的设计方法,用于要求高可靠性和鲁棒性的应用。提出了灵敏度分析,显示了用于补偿的元件值的变化如何影响回路传递函数。为了减轻工艺变化和输出滤波器电感电容不确定性的影响,提出了一种智能可编程补偿方案。所描述的技术已经通过晶体管级仿真得到验证,考虑在1.2 mhz开关频率下工作的多相降压转换器,由5v输入供电并产生1v稳压输出。该稳压器采用0.25 μm CMOS技术设计,布局面积为0.36 mm2。在不损失一般性的情况下,所提出的方法可以扩展到其他类型的dc-dc开关稳压器,单相或多相电压模式。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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