P. Napolitano, K. Kelliher, B. A. Mukhtar, Diarmuid Carey, Owen Cregg
{"title":"An effective methodology for robust design of monolithic voltage regulators","authors":"P. Napolitano, K. Kelliher, B. A. Mukhtar, Diarmuid Carey, Owen Cregg","doi":"10.1109/ICECS.2016.7841166","DOIUrl":null,"url":null,"abstract":"A procedure for the design of fully integrated voltage regulators is proposed in this paper, for applications requiring high levels of reliability and robustness. A sensitivity analysis is presented, showing how variations in the values of the components, used for the compensation, affect the loop transfer function. To mitigate the effect of process variations and uncertainty in the inductances and capacitances of the output filter, a smart programmable compensation scheme is proposed. The described technique has been verified through transistor level simulations, considering a multiphase buck converter, operated at 1.2-MHz switching frequency, supplied by a 5-V input and generating a 1-V regulated output. The regulator has been designed in a 0.25-μm CMOS technology and occupies a layout area of 0.36-mm2. Without loss of generality, the proposed methodology can be extended to other types of dc-dc switching regulators, single-phase or multi-phase in voltage mode.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2016.7841166","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
A procedure for the design of fully integrated voltage regulators is proposed in this paper, for applications requiring high levels of reliability and robustness. A sensitivity analysis is presented, showing how variations in the values of the components, used for the compensation, affect the loop transfer function. To mitigate the effect of process variations and uncertainty in the inductances and capacitances of the output filter, a smart programmable compensation scheme is proposed. The described technique has been verified through transistor level simulations, considering a multiphase buck converter, operated at 1.2-MHz switching frequency, supplied by a 5-V input and generating a 1-V regulated output. The regulator has been designed in a 0.25-μm CMOS technology and occupies a layout area of 0.36-mm2. Without loss of generality, the proposed methodology can be extended to other types of dc-dc switching regulators, single-phase or multi-phase in voltage mode.