Wenjun Tang, Jialong Liu, Huazhong Yang, Chen Jiang, Xueqing Li
{"title":"High-density energy-efficient charge-domain computing based on CAA-IGZO TFT with BEOL-compatible 3D integration","authors":"Wenjun Tang, Jialong Liu, Huazhong Yang, Chen Jiang, Xueqing Li","doi":"10.1109/IFETC53656.2022.10015688","DOIUrl":null,"url":null,"abstract":"Computing-in-memory (CiM) is an efficient solution for modern data-intensive applications including neural networks (NNs). However, existing CiM implementations are facing capacity challenges to meet the rapidly increased data volume. Also, the 2D interface limits the performance improvement of CiM. This paper presents a high-density 4T1C CiM design based on stacked channel-all-around (CAA) In–Ga–Zn-O (IGZO) TFTs. The 4T1C CiM cell exhibits an 8F2 feature size plus further stacking possibility. An interleaved timing control is adopted to reduce the interference of adjacent lines in the compact layout. With the back-end-of-line (BEOL) integration capability, the proposed CiM structure can be integrated vertically above CMOS peripherals to build a high-throughput area-efficient 3D CiM architecture, showing high storage density of 7.40 Mb/mm2/layer and high computing density of 92.6 TOPS/mm2 for CiM array only.","PeriodicalId":289035,"journal":{"name":"2022 IEEE International Flexible Electronics Technology Conference (IFETC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-08-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Flexible Electronics Technology Conference (IFETC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IFETC53656.2022.10015688","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Computing-in-memory (CiM) is an efficient solution for modern data-intensive applications including neural networks (NNs). However, existing CiM implementations are facing capacity challenges to meet the rapidly increased data volume. Also, the 2D interface limits the performance improvement of CiM. This paper presents a high-density 4T1C CiM design based on stacked channel-all-around (CAA) In–Ga–Zn-O (IGZO) TFTs. The 4T1C CiM cell exhibits an 8F2 feature size plus further stacking possibility. An interleaved timing control is adopted to reduce the interference of adjacent lines in the compact layout. With the back-end-of-line (BEOL) integration capability, the proposed CiM structure can be integrated vertically above CMOS peripherals to build a high-throughput area-efficient 3D CiM architecture, showing high storage density of 7.40 Mb/mm2/layer and high computing density of 92.6 TOPS/mm2 for CiM array only.