Implementing a Tab Tape-based Known Good Die Method

M. Salatino, R. Nolan, T. Bishop, C. Bieber
{"title":"Implementing a Tab Tape-based Known Good Die Method","authors":"M. Salatino, R. Nolan, T. Bishop, C. Bieber","doi":"10.1109/ICMCM.1994.753523","DOIUrl":null,"url":null,"abstract":"The success of nearly every multichip electronic system depends on the availability of functional, reliable chips. As chip counts in a multichip system increase, this dependency is critical. In most cases, \"known good\" die (KGD) are not readily available in an unpackaged form. This was a prime consideration in MCC's. Flip Chip Development Project. As part of this project, MCC was chartered with developing a method for high speed test and dynamic burn-in of single, bare IC chips. The method developed can be implemented by bare die users using \"off-the-shelf\" technology. It can also be implemented by bare chip suppliers without modification to the existing fabrication processes. The heart of this process is a TAB tape-based carrier. TAB tape is used to contact the chip bond pads (without actual metallurgical bonding) at about 10 grams per lead contact force. The chip is clamped to the TAB leads, and held in place so that the tape site (in its JEDEC-standard slide carrier) can be transported, tested, and burned-in just like TAB chip-on-tape. Upon test completion, the chip is removed, and is ready for wire bonding, flip chip attach, etc. The carrier has been characterized with aluminum, gold, and solder-bumped chip bond pads, and is compatible with these pad metallizations. Four re-uses of the carrier through 168 hours/150\"C of burn-in have been demonstrated. In this paper, the results of MCC's initial prototype testing are discussed. Data includes contact resistance vs. pressure, chip metallurgy, and time. The cost of this approach is presented for a wide range of production volumes. In addition, preliminary results from beta-site testing (by a bare chip supplier) of this method are presented.","PeriodicalId":363745,"journal":{"name":"Proceedings of the International Conference on Multichip Modules","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the International Conference on Multichip Modules","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMCM.1994.753523","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

The success of nearly every multichip electronic system depends on the availability of functional, reliable chips. As chip counts in a multichip system increase, this dependency is critical. In most cases, "known good" die (KGD) are not readily available in an unpackaged form. This was a prime consideration in MCC's. Flip Chip Development Project. As part of this project, MCC was chartered with developing a method for high speed test and dynamic burn-in of single, bare IC chips. The method developed can be implemented by bare die users using "off-the-shelf" technology. It can also be implemented by bare chip suppliers without modification to the existing fabrication processes. The heart of this process is a TAB tape-based carrier. TAB tape is used to contact the chip bond pads (without actual metallurgical bonding) at about 10 grams per lead contact force. The chip is clamped to the TAB leads, and held in place so that the tape site (in its JEDEC-standard slide carrier) can be transported, tested, and burned-in just like TAB chip-on-tape. Upon test completion, the chip is removed, and is ready for wire bonding, flip chip attach, etc. The carrier has been characterized with aluminum, gold, and solder-bumped chip bond pads, and is compatible with these pad metallizations. Four re-uses of the carrier through 168 hours/150"C of burn-in have been demonstrated. In this paper, the results of MCC's initial prototype testing are discussed. Data includes contact resistance vs. pressure, chip metallurgy, and time. The cost of this approach is presented for a wide range of production volumes. In addition, preliminary results from beta-site testing (by a bare chip supplier) of this method are presented.
基于标签带的已知好模方法的实现
几乎每个多芯片电子系统的成功都依赖于功能可靠的芯片的可用性。随着多芯片系统中芯片数量的增加,这种依赖性是至关重要的。在大多数情况下,“已知好的”模具(KGD)不容易以未包装的形式提供。这是世纪挑战集团的首要考虑因素。倒装芯片开发项目。作为该项目的一部分,中冶集团被授权开发一种高速测试和单个裸IC芯片动态老化的方法。所开发的方法可以由裸模用户使用“现成”技术实现。它也可以由裸片供应商实施,而无需修改现有的制造工艺。这个过程的核心是一个基于TAB磁带的载体。TAB胶带用于接触芯片粘合垫(没有实际的冶金粘合),每铅接触力约为10克。芯片夹在标签引线上,并固定在适当的位置,以便胶带部位(在其jedec标准滑动载体中)可以运输,测试和刻录,就像标签芯片在胶带上一样。测试完成后,芯片被移除,并准备进行导线键合,倒装芯片连接等。载体的特点是具有铝、金和焊接碰撞芯片键合垫,并且与这些垫金属化相兼容。通过168小时/150”C的老化,已经证明了载体的四次重复使用。本文讨论了MCC初始样机试验的结果。数据包括接触电阻与压力、切屑冶金和时间。这种方法的成本适用于各种产量。此外,本文还介绍了该方法(由一家裸片供应商)的beta-site测试的初步结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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