Accelerating a radio astronomy correlator on FPGA

Shuaizhi Guo, Linlin Zheng, Xi Jin
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Abstract

Radio astronomy correlator shows its significance in astronomical measurements. However, computational cost presents a barrier because of the increasing of the array size as well as the number of antennas. So the correlators which deal with signals coming from all the antennas are extremely computationally intensive process. Efficient usage of hardware should be explored in order to meet this computational challenge. This paper focus on the most computationally expensive parts in radio astronomy correlator and accelerate it using single FPGA. Results shows that the proposed hardware designs speed up the computation by at least 150 times compared with single thread CPU implementation, and at least 4 times compared with FPGA design without optimization. The throughput of our design is also higher than fully parallel CPU solution for at least 10 times, and defeats FPGA implementation without optimization in most cases.
基于FPGA的射电天文相关器加速
射电天文相关器在天文测量中的重要意义可见一斑。然而,由于阵列尺寸和天线数量的增加,计算成本出现了障碍。所以处理来自所有天线的信号的相关器是一个计算量非常大的过程。为了应对这一计算挑战,必须探索硬件的有效利用。本文针对射电天文相关器中计算量最大的部分,采用单FPGA实现了对射电天文相关器的加速。结果表明,所提出的硬件设计与单线程CPU实现相比,计算速度至少提高150倍,与未经优化的FPGA设计相比,计算速度至少提高4倍。我们设计的吞吐量也比完全并行CPU解决方案高出至少10倍,并且在大多数情况下没有优化就击败FPGA实现。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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